Matthew I. Frank

Publication List

Latest

  • Mayank Agarwal; Nitin Navale; Kshitiz Malik; Matthew I. Frank; Fetch-Criticality Reduction Through Control Independence, International Symposium on Computer Architecture, (ISCA-35), June, 2008.
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External Publications

  • Kshitiz Malik; Mayank Agarwal; Sam S. Stone; Kevin M. Woley; Matthew I. Frank; Branch-mispredict Level Parallelism (BLP) for Control Independence, International Symposium on High-Performance Computer Architecture, (HPCA-14), February, 2008.
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  • Kshitiz Malik; Mayank Agarwal; Vikram Dhar; Matthew I. Frank; PaCo: Probability-based Path Confidence Prediction, International Symposium on High-Performance Computer Architecture, (HPCA-14), February, 2008.
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  • Kshitiz Malik; Mayank Agarwal; Matthew I. Frank; Adaptive Memory Synchronization (AMS): Balancing the Risks and Benefits of Inter-thread Load Speculation, Second Annual Reconfigurable and Adaptive Architecture Workshop (RAAW-2), held in conjunction with the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40), December, 2007.
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  • Wen-Mei W. Hwu; Shane Ryoo; Sain-Zee Ueng; John H. Kelm; Issac Gelado; Sam S. Stone; Robert E. Kidd; Sara Sadeghi Baghsorkhi; Aqeel A. Mahesri; Stephanie Tsao; Nacho Navarro; Steve S. Lumetta; Matthew I. Frank; Sanjay J. Patel: Implicitly Parallel Programming Models for Thousand-Core Microprocessors, Design Automation Conference, (DAC-44), 2007.
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  • Mayank Agarwal, Kshitiz Malik, Kevin M. Woley, Sam S. Stone and Matthew I. Frank, Exploiting Postdominance for Speculative Parallelization, Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA-13), February, 2007.
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  • Shane Ryoo; Sain-Zee Ueng; Christopher I. Rodrigues; Robert E. Kidd; Matthew I. Frank; Wen-mei W. Hwu: Automatic Discovery of Coarse-Grained Parallelism in Media Applications, Trans. High-Performance Embedded Architectures and Compilers I, published by Springer Lecture Notes in Computer Science 4050:194-213, 2007.
  • Sam S. Stone, Kevin M. Woley and Matthew I. Frank, Address-Indexed Memory Disambiguation and Store-to-Load Forwarding, Proceedings of the International Symposium on Microarchitecture (MICRO-38), November, 2005.
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  • M. B. Taylor, W. Lee, J. Miller, D. Wentzlaff, I. Bratt, B. Greenwald, H. Hoffmann, P. Johnson, J. Kim, J. Psota, A. Saraf, N. Shnidman, V. Strumpen, M.I. Frank, S. Amarasinghe and A. Agarwal, Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams, Proceedings of the International Symposium on Computer Architecture (ISCA), June, 2004.
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  • M. B. Taylor, J. Kim, J. Miller, D. Wentzlaff, F. Ghodrat, B. Greenwald, H. Hoffman, P. Johnson, J.-W. Lee, W. Lee, A. Ma, A. Saraf, M. Seneski, N. Shnidman, V. Strumpen, M. I. Frank, S. P. Amarasinghe, and A. Agarwal, The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs, IEEE Micro, 22(2):25-35, 2002.
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  • C. A. Moritz and M. Frank, LoGPC: Modeling Network Contention in Message-Passing Programs, IEEE Transactions on Parallel and Distributed Systems, 12(4), April 2001.
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  • Csaba Andras Moritz, Matthew Frank, and Saman Amarasinghe, FlexCache: A Framework for Flexible Compiler Generated Data Caching, The 2nd Workshop on Intelligent Memory Systems, Boston, MA, F.T. Chong, C. Kozyakis, and M. Oskin (Eds.) Springer-Verlag Lecture Notes in Computer Science, 2107:135-146, November 12, 2000.
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  • J. Babb, M. Rinard, A. Moritz, W. Lee, M. Frank, R. Barua, and S. Amarasinghe Parallelizing Applications Into Silicon, Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines '99 (FCCM '99), Napa Valley, CA, April 1999.
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  • W. Lee, R. Barua, M. Frank, D. Srikrishna, J. Babb, V. Sarkar, and S. Amarasinghe, Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine, Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VIII), San Jose, CA, October 4-7, 1998.
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  • C. A. Moritz and M. Frank, LoGPC: Modeling Network Contention in Message-Passing Programs, Proceedings of SIGMETRICS 98, Madison, WI, June 24-26, 1998. (This is an earlier version of the TPDS paper listed above).
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  • K. Mackenzie, J. Kubiatowicz, M. Frank, W. Lee, V. Lee, A. Agarwal and M. F. Kaashoek, Exploiting Two-Case Delivery for Fast Protected Messaging, Proceedings of the Fourth International Symposium on High-Performance Computer Architecture (HPCA), Las Vegas, NV, February 2-4, 1998.
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  • E. Waingold, M. Taylor, D. Srikrishna, V. Sarkar, W. Lee, V. Lee, J. Kim, M. Frank, P. Finch, R. Barua, J. Babb, S. Amarasinghe, and A. Agarwal, Baring It All to Software: Raw Machines, IEEE Computer, September 1997, pp. 86-93.
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  • M. Frank, A. Agarwal and M. Vernon, LoPC: Modeling Contention in Parallel Algorithms, Proceedings of SIXTH ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), Las Vegas, Nevada, June 18-21, 1997, pp. 276-287.
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  • W. Lee, M. Frank, V. Lee, K. Mackenzie and L. Rudolph, Implications of I/O for Gang Scheduled Workloads, 3rd Workshop on Job Scheduling Strategies for Parallel Processing, Geneva, Switzerland, D. G. Feitelson and L. Rudolph (Eds.), Springer-Verlag, Lecture Notes in Computer Science Vol. 1291, April 5, 1997.
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  • J. Babb, M. Frank, V. Lee, E. Waingold, R. Barua, M. Taylor, J. Kim, S. Devabhaktuni, and A. Agarwal, The RAW Benchmark Suite: Computation Structures for General Purpose Computing, Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa Valley, CA, April 1997.
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  • J. Babb, M. Frank and A. Agarwal, Solving Graph Problems with Dynamic Computation Structures, Conference on Reconfigurable Technology for Rapid Product Development and Computing, at PhotonicsEast 96, November 1996.
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  • F. Traenkle, M. Frank, M. Vernon and S. Kim, Solving Microstructure Electrostatics with MIMD Parallel Supercomputers and Split-C, Journal of Non-Newtonian Fluid Mechanics, Vol 53, pp. 197-213, (1994).
  • M. Frank and M. Vernon, A Hybrid Shared Memory/Message Passing Parallel Machine, International Conference on Parallel Processing, Vol I, pp. 232-236, August 1993.
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Technical Reports

  • Matthew I. Frank, System Support for Implicitly Parallel Programming, University of Illinois Center for Reliable and High-Performance Computing Technical Report CRHC-07-06, October 8, 2007.
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  • Sam S. Stone, Kevin M. Woley, Kshitiz Malik, Mayank Agarwal, Vikram Dhar and Matthew I. Frank, Synchronizing Store Sets (SSS): Balancing the Benefits and Risks of Inter-thread Load Speculation, University of Illinois Center for Reliable and High-Performance Computing Technical Report UILU-ENG-06-2221, Nov 17, 2006.
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  • Kshitiz Malik, Kevin M. Woley, Samuel S. Stone, Mayank Agarwal, Vikram Dhar, Matthew I. Frank, Confidence Based Out-of-Order Renaming for Speculatively Multithreaded Processors, University of Illinois Center for Reliable and High-Performance Computing Technical Report UILU-ENG-06-2208, June, 9, 2006.
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  • Matthew I. Frank and Saman Amarasinghe, Scalar Queue Conversion: Dynamic Single Assignment For Concurrent Scheduling, University of Illinois Center for Reliable and High-Performance Computing Technical Report UILU-ENG-03-2215, August 2003.
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  • Matthew Frank, Walter Lee and Saman Amarasinghe, A Software Framework for Supporting General Purpose Applications on Raw Computation Fabrics, MIT-LCS Technical Memo MIT-LCS-TM-619, July 20, 2001.
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  • M. Frank, C. A. Moritz, B. Greenwald, S. Amarasinghe, and A. Agarwal, SUDS: Primitive Mechanisms for Memory Dependence Speculation, MIT/LCS Technical Memo MIT-LCS-TM-591, January 6, 1999.
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Dissertation

  • Matthew Frank, SUDS: Automatic Parallelization for Raw Processors, Ph.D. thesis, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, May 23, 2003.
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Web-only Memos